Quantum Compilation for Post-NISQ Architectures

Abstract

This thesis provides an overview of novel techniques for compiling quantum circuits to surface code architectures. This includes memory allocation, routing, patch rotation, and non-local ancillae support. Compiled memory units are treated as containing their own scope which provide support for program composition via the allocation and deallocation of blocks representing functional or factory units. This methodology is tested against a range of common quantum circuits, and against a novel quantum CPU architecture. The quantum CPU architecture provides support for operations and inverse operations, and by flipping control flow reversible computation as an instruction. With these primitives we implement reversible switches, loops and function calls using a history buffer memory unit. This provides architectural support or automatic uncomputation. We benchmark a small implementation of this model using our surface code compiler and find that it is likely to be computationally infeasible due to a 20000 toc overhead to process each instruction for an 8-qubit architecture.